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ARC (Argonaut RISC Core) embedded processors are a family of 32-bit CPUs originally designed by ARC International, with roots in the Super FX chip for the Super Nintendo Entertainment System. They are widely used in SoC devices for storage, home, mobile, automotive, and Internet of Things applications. ARC processors have been licensed by more than 200 organizations and are shipped in more than 1.5 Billion products per year. ARC processors are now part of the Synopsys DesignWare series, and can be optimized for a wide range of uses. Designers can differentiate their products by using patented configuration technology to tailor each ARC processor instance to meet specific performance, power and area requirements. The ARC processors are also extendable, allowing designers to add their own custom instructions that can significantly increase performance or reduce power consumption. ARC processors are RISC processors, and utilize a 16-/32-bit instruction set architectures that provides good performance and code density for embedded and host SoC applications. The processors are synthesizable and can be implemented in any foundry or process, and are supported by a complete suite of development tools. Configuration of the ARC processors occurs at design time, using the ARChitect processor configurator. The core was designed to be extensible. Unlike most embedded microprocessors, extra instructions, registers and functionality can be added, in a Lego-block kind of manner. Customers analyse the task, break down the operations, and then choose the appropriate extensions, or develop their own to create their own custom microprocessor. They might optimise for speed, energy efficiency or code density. Extensions can include for example, an MMU, a fast multiplier–accumulator, a USB Host, a viterbi path decoder, or a user's proprietary RTL functions. == Families == Synopsys’s DesignWare ARC Processor IP includes the ARC HS, ARC EM, ARC 700 and ARC 600 families of 32-bit processor cores, as well as the ARC AS211 and AS221 audio processors and optimized software audio codecs. ARC processor cores are based on a flexible and proven industry-standard instruction set architecture (ISA) with features optimized for a broad range of embedded and deeply embedded applications. The ARC processors feature: * Performance-efficient designs deliver maximum performance while consuming a minimum amount of power and silicon area * Highly configurable processors can be performance- and power-optimized for each instance on an SoC while sharing a common programming model * Extensible ISA supports user-defined custom instructions, enabling integration of users’ proprietary hardware to accelerate application-specific tasks * Streamlined system integration through the ability to closely couple memory and directly map peripherals to the core, reduce system latency and cost 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「ARC (processor)」の詳細全文を読む スポンサード リンク
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